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September 26, 2008 - Congratulations to all the winners! More about the Hackontest event will follow...

Pre-Hacking dinner of OpenLieroX

Working inside the box

Bruce Peren's evaluation

Harald Welte's review

 
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About Carl-Daniel Hailfinger

http://www.hailfinger.org

Carl-Daniel Hailfinger is finishing his Diplom (Master's Degree) in Bioinformatics at the University of Tübingen (Germany).
First steps in electronics at the age of 8, started programming at 10. Linux user since 1998, first kernel patch in 2002, after that various kernel patches to netfilter, infrastructure and drivers. Performed clean room reverse engineering of the binary only nForce network driver as a basis for forcedeth.
Since 2006 active in flashrom und coreboot (called LinuxBIOS back then), one of the developers of the early OLPC prototype firmware.
Focused on correctness, security and usability.

Hackontest statistics

Agreed to implement 8 features

Bring up the K8 (Athlon64) in coreboot v3
Create flashrom support for the EeePc
Offer a compat BIOS plugin
Offer a compat EFI plugin
Easy web interface to create coreboot ROMs
Add AMD 690 chipset series support to coreboot
Add AMD 700 chipset series support to coreboot
Add support for AMD Phenom processors

Created 1 projects

coreboot

Created 8 features

Bring up the K8 (Athlon64) in coreboot v3
Create flashrom support for the EeePc
Offer a compat BIOS plugin
Offer a compat EFI plugin
Easy web interface to create coreboot ROMs
Add AMD 690 chipset series support to coreboot
Add AMD 700 chipset series support to coreboot
Add support for AMD Phenom processors

Wrote 5 comments

Sorry, this is not doable in 24 hours. Because key information about the chipset, processor and embedded controller is unavailable, we would need ~12 months of reverse engineering. Even if we had all the docs, porting would take a lot longer than 24 hours because of the embedded controller.
If this feature is selected, implementers will have to agree on a small subset of the requested feature.
The compatibility BIOS plugin is now called SeaBIOS.
Since this feature depends on a few unimplemented bits of critical infrastructure, we have started to work on that infrastructure. Everything is coming along nicely and we expect to implement this feature within 24 hours of heavy collaboration during Hackontest.
Support for the AMD 690/SB600 chipset has been added to coreboot a few weeks ago.

Rated 16 features

Comparing/Syncing/Merging of Server/Databases/Tables
Manage stored procedures and functions
menu transition to XDG *.desktop menu system
Add support for theora .OGG files as input source
Support for footnotes
Use linux-libre
Bring up the K8 (Athlon64) in coreboot v3
Bring up coreboot v3 on an Asus eeepc
Create flashrom support for the EeePc
Speed consideration
Offer a compat BIOS plugin
Offer a compat EFI plugin
Easy web interface to create coreboot ROMs
Add AMD 690 chipset series support to coreboot
Add AMD 700 chipset series support to coreboot
Add support for AMD Phenom processors